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Change split logic to allow advanced patterns

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- \v  (Fix #67)
- \zs (Fix #55)
This commit is contained in:
Junegunn Choi
2015-10-01 19:26:46 +09:00
parent 98e0b493ac
commit 504eab0f59
2 changed files with 45 additions and 10 deletions
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34
test/fixed.vader
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@@ -212,4 +212,38 @@ Expect:
aa -= bb
aaa ?= bbb
* #67 \v
Given c:
bzero(&servaddr, sizeof(servaddr));
servaddr.sin_family = AF_INET;
servaddr.sin_addr.s_addr = htonl(INADDR_ANY);
servaddr.sin_port = htons(SERV_PORT);
Execute (#67 \v breaks surrounding regex):
%EasyAlign/\v(\=\s)@<=</
Expect:
bzero(&servaddr, sizeof(servaddr));
servaddr.sin_family = AF_INET;
servaddr.sin_addr.s_addr = htonl(INADDR_ANY);
servaddr.sin_port = htons(SERV_PORT);
Execute (#67 \V followed by \v shouldn't matter):
%EasyAlign/\v(\=\s)@<=<\V/
Expect:
bzero(&servaddr, sizeof(servaddr));
servaddr.sin_family = AF_INET;
servaddr.sin_addr.s_addr = htonl(INADDR_ANY);
servaddr.sin_port = htons(SERV_PORT);
Execute (#67 \zs is now allowed):
%EasyAlign/=\zs/
Expect:
bzero(&servaddr, sizeof(servaddr));
servaddr.sin_family = AF_INET;
servaddr.sin_addr.s_addr = htonl(INADDR_ANY);
servaddr.sin_port = htons(SERV_PORT);
Include: include/teardown.vader